I first saw the idea at: http://www.piclist.com/techref/io/serial/RCL1.htm

russ_hensel

These displays are piggy-backing on motes, connecting through a DF9 socket (http://www.hirose.co.jp/cataloge_hp/e54000041.pdf) on the mote. The board I’m building is like a parasite which looks at the motes sensors, hopefully without disturbing the mote’s function which has off-the shelf firmware. Each node is runing off a power supply so I don’t have to worry about all that stuff!

Here’s a link to the project: http://www.goldsmiths.ac.uk/interaction/health.html

I’m a designer rather than an engineer, but I get there in the end, but not without kind help along the way!

I’m going to insert some assembler code for the interval, I recall now a snippit on the pic basic forum which did something similar.

NOP is “no operation,” an opcode in many assembly languages to do nothing for one clock cycle. Some higher-level languages, particularly for embedded systems programming, use it also, to cause a short delay.

For example, LogoChip Logo, the language I’ve been using on PIC microcontrollers, has wait n (n intervals of .1 second) and mwait n (n μs); and also no-op, which waits for one cycle in the virtual machine — about 13 ns, if I recall correctly.

I don’t know Picbasic, but you might look for a NOP or no-op in it. If not, your PAUSEUS should be more than adequate.

So . . . what are you building with a bar-graph and two digits?

Picbasic has a PAUSEUS to create a microsecond pause, I guess this is x10 the 100ns you and the datasheet suggest for the Latch pulse width – infact my PIC is using a 20 MHz clock to I only need 50ns.

So my last question is, what is this NOP you mention to create a delay?

I’d suggest two fixes for your code. First, as you noted already, make two latch lines.

Second, leave /OE low all the time. When you raise it high, you’re turning off the LEDs. Just strobe the latch high for at least 100ns when you want to latch the new data you’ve shifted in.

So:


‘enable driver for 10-bit bar
LOW enable1_6276
LOOKUP2 barIndex, [0,1,3,7,15,31,63,127,255,511,1023], bits_bar
LOW latch_6276
LOW clock_6276
’shift data out
SHIFTOUT data_6276, clock_6276, MSBFIRST, [bits_bar\10]
HIGH latch_6276
Add 100ns delay here -- maybe a few NOPs
LOW latch_6276
HIGH enable1_6276


And then a similar change for your two-digit driver.

What’s happening right now is that you’re shifting bar-graph bits into both the bar-graph and two-digit displays and latching it to both outputs, then shifting two-digit bits into both displays and latching to both outputs. You want to latch bar-graph data only into the bar-graph driver output, and two-digit data only into the two-digit output.

Page 2 of the datasheet has a nice diagram showing the serial-parallel shift register separate from the output latch.

So in parallel, each A6276 needs its own Latch Enable (pin4) and its own output enable (pin21), then a common SDI and clock. Thats 6 pins for 2 drivers?

Here’s the code that is broke:

controlLEDdrivers:

‘enable driver for 10-bit bar
LOW enable1_6276
LOOKUP2 barIndex, [0,1,3,7,15,31,63,127,255,511,1023], bits_bar
LOW latch_6276
LOW clock_6276
‘shift data out
SHIFTOUT data_6276, clock_6276, MSBFIRST, [bits_bar\10]
HIGH latch_6276
HIGH enable1_6276

‘enable driver for 7 segment displays
LOW enable2_6276
LOOKUP2 dig1Index, [252,96,218,242,102,182,190,224,254,246], bits_dig1
LOOKUP2 dig2Index, [252,96,218,242,102,182,190,224,254,246], bits_dig2
bits_dig.byte1 = bits_dig1
bits_dig.byte0 = bits_dig2
LOW latch_6276
LOW clock_6276
‘shift data out
SHIFTOUT data_6276, clock_6276, LSBFIRST, [bits_dig\16]
HIGH latch_6276
HIGH enable2_6276

return

If I were to use 2 pins for the latches (“latch1_6276″ and “latch2_6276″ for example) things would work?

Well I’m trying it now…

thanks again, Tobie

If you want to use two A6276s, you can hook them up in two ways: series or parallel.

In series, the first chip’s serial data out (SDO) should connect to the second chip’s serial data in (SDI), the clock (CK) signal should connect to both chips, and the latch enable (L) should connect to both chips. Then any time you want to update a signal somewhere, you need to shift out 32 bits of data (enough to fill the entire pipeline of both chips) and then latch it. This is how I drive the two A6276s within one of my clock’s digits.

In parallel, you connect your PIC to both chip’s SDI lines and clock lines, and connect a separate pin to each chip’s latch enable line. You only have to clock out sixteen bits of data at a time, enough to fill one chip. Both chips will have the new data in their buffers, but only the one you latch will then use it to drive its output. This is how I connect the six pairs of A6276s for my clock’s six digits.

I see you have made extensive Allegro’s A6276 LED driver.

I’m having some problems addressing multiple A6276s. Singly I can get either to play nicely, but otherwise I get mess on the LEDs. One driver had a 10 bar display, the other has x2 seven segment arrays.

I think I don’t fully understand how and when the latch enable should be used – I’m using picbasic pro with a 16F876.

best wishes,
Tobie